Meta-heuristic optimization of PWM techniques for advanced multilevel inverter applications: A review of Selective Harmonic Elimination (SHE) Strategies

Multilevel inverters (MLIs) are the converter topology of choice for medium- and high-power applications, including renewable energy integration, motor drives, and flexible AC transmission systems, owing to their ability to synthesize near-sinusoidal output voltage with lower switching losses and reduced electromagnetic interference compared with two-level converters. Among the modulation strategies used to control MLIs, Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) remains the preferred low-switching-frequency technique because it offers direct, deterministic control over specific low-order harmonics while maximizing the fundamental output voltage. However, the SHE-PWM problem reduces to a system of nonlinear transcendental equations that becomes increasingly difficult to solve as the number of inverter levels and therefore the number of switching angles — increases. Classical iterative solvers such as the Newton-Raphson method and algebraic approaches based on resultant theory are highly sensitive to initial guesses and become computationally prohibitive at higher levels. This has motivated an extensive body of research applying meta-heuristic optimization algorithms  including Genetic Algorithms, Particle Swarm Optimization, Differential Evolution, Ant Colony Optimization, Artificial Bee Colony, Cuckoo Search, Bat Algorithm, Grey Wolf Optimizer, Whale Optimization Algorithm, Salp Swarm Algorithm, Teaching-Learning-Based Optimization, and numerous hybrid variants  to solve the SHE-PWM angle-computation problem without requiring an analytical or near-optimal initial guess. This review consolidates and critically examines this literature: it presents the mathematical formulation of the SHE-PWM problem with explicit governing equations, illustrates the underlying staircase waveform and the generic meta-heuristic solution workflow through diagrams, offers a comparative discussion of algorithm families and their reported performance in terms of total harmonic distortion (THD), convergence behaviour, and computational burden, and consolidates this comparison into descriptive and attribute-based tables. Persistent research gaps — including limited real-time embedded implementation, inconsistent benchmarking practices, and insufficient treatment of asymmetric and reduced-switch-count topologies are identified, and future research directions are proposed.