Designing low-temperature plasma-enhanced chemistries for conformal etch-stop layer deposition in advanced FinFET structures
Department of Chemical Engineering, University of Toledo, USA.
Review Article
World Journal of Advanced Research and Reviews, 2024, 21(02), 2094-2113
Publication history:
Received on 13 January 2024; Revised 20 February 2024; accepted on 25 February 2024
Abstract:
As device scaling in Fin Field-Effect Transistor (finFET) technology advances toward the 3 nm node and beyond, the need for precise etch-stop layers that are both conformal and thermally compatible with high-aspect-ratio structures becomes increasingly critical. Conventional thermal deposition techniques face significant limitations due to poor step coverage and high thermal budgets that can damage sensitive device materials. This study explores the development of low-temperature plasma-enhanced chemistries to enable conformal deposition of etch-stop layers on complex FinFET architectures, including narrow fins, trenches, and gate-all-around (GAA) structures. We introduce a set of plasma-enhanced atomic layer deposition (PEALD) processes using organometallic precursors and tailored plasma reactants at substrate temperatures below 150 °C. Focus materials include silicon nitride (SiNₓ), hafnium oxide (HfO₂), and boron carbide (BₓCᵧ), which are critical for etch resistance and interface control. In situ surface diagnostics—such as quartz crystal microbalance (QCM), Fourier-transform infrared spectroscopy (FTIR), and ellipsometry—were employed to monitor growth per cycle and film conformality. The incorporation of remote plasma and pulsed plasma modes was shown to enhance precursor adsorption and reduce ion-induced damage, ensuring highly uniform coatings over complex 3D topographies. The resulting films exhibited excellent etch resistance, high density, and minimal hydrogen incorporation, with step coverage exceeding 90% in trenches with aspect ratios above 20:1. These chemistries were further validated through integration into FinFET test structures, demonstrating improved line-edge definition and reduced gate leakage. This research underscores the viability of low-temperature plasma-enhanced processes for enabling next-generation, damage-free etch-stop solutions in advanced logic device fabrication.
Keywords:
Low-Temperature PEALD; Etch-Stop Layer; Conformal Deposition; FinFET; Plasma Chemistry; Advanced CMOS Integration
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